| PART |
Description |
Maker |
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| 2020-900 2020-1400 2021-200 2021-250 2020-700 2021 |
Delay 900 /-18 ns, fixed SIP delay line Tr
Delay 1400 /-28 ns, fixed SIP delay line Tr
Delay 200 /-10 ns, fixed SIP delay line Tr
Delay 250 /-10 ns, fixed SIP delay line Tr
Delay 700 /-14 ns, fixed SIP delay line Tr
Delay 100 /-10 ns, fixed SIP delay line Tr
Delay 150 /-10 ns, fixed SIP delay line Tr
Delay 500 /-10 ns, fixed SIP delay line Tr
Delay 1300 /-26 ns, fixed SIP delay line Tr
|
Data Delay Devices Inc
|
| ASMP5P23S04A ASM5P23S04AF-1-08-SR ASM5P23S04AF-1-0 |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
|
PulseCore Semiconductor
|
| W15202 W152 W152-4G W152-1G W152-2G W152-11G W152- |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware™, Eight Output Zero Delay Buffer PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
Spread Aware? Eight Output Zero Delay Buffer
Spread Aware?? Eight Output Zero Delay Buffer
Spread Aware垄芒, Eight Output Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| CY2308SI-1HT CY2308ZI-1HT CY2308SXI-5HT CY2308SXI- |
3.3V Zero Delay Buffer 3.3零延迟缓冲器
3.3V Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| ISPPACCLK5610AV-01TN48C ISPPACCLK5610AV-01TN48I IS |
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 TQFP-100
5600 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 TQFP-48
CLOCK GENERATOR, ISP, SMD, TQFP48; Frequency, clock:10MHz; Temp, op. min:0(degree C); Temp, op. max:70(degree C); Pins, No. of:48; Case style:TQFP / 48; Base number:5610; Packaging type:Peel Pack; Voltage, Vcc:3.3V; Temperature, RoHS Compliant: Yes
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| IDT230507 IDT2305 IDT2305-1DCG IDT2305-1DCGI IDT23 |
2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ZERO DELAY CLOCK BUFFER
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| IDT23S08-5HPGI IDT23S08 IDT23S08-1 IDT23S08-1DC ID |
From old datasheet system
3.3V ZERO DELAY CLOCK MULTIPLIER, SPREAD SPECTRUM COMPATIBLE 23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
|
| 3D7010SERIES 3D7010S-80 3D7010S-90 3D7010S-400 |
300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit 整体0 - TAP在固定延迟线
MONOLITHIC 10-TAP FIXED DELAY LINE
Delay 8 /-1.5 ns, monolithic 10-TAP fixed delay line
Delay 9 /-1.7 ns, monolithic 10-TAP fixed delay line
Delay 40 /-4 ns, monolithic 10-TAP fixed delay line
|
Interpower, Corp.
Data Delay Devices Inc
|
| IDT2308 IDT2308-1HDC8 IDT2308-1HDCI8 IDT2308-1HPG8 |
3.3V ZERO DELAY CLOCK MULTIPLIER
|
IDT
|
| IDT2305A |
3.3V ZERO DELAY CLOCK BUFFER
|
IDT
|
